TVP5150AMIPBSR

Product Summary

The TVP5150AMIPBSR is an ultralow power NTSC/PAL/SECAM video decoder. Available in a space saving 32-pin TQFP package, the TVP5150AMIPBSR decoder converts NTSC, PAL, and SECAM video signals to 8-bit ITU-R BT.656 format. Discrete syncs are also available. The optimized architecture of the TVP5150AMIPBSR decoder allows for ultralow-power consumption. The decoder consumes 115 mW of power in typical operation and consumes less than 1 mW in power-down mode, considerably increasing battery life in portable applications. The decoder uses just one crystal for all supported standards. The TVP5150AMIPBSR decoder can be programmed using an I2C serial interface. The decoder uses a 1.8-V supply for its analog and digital supplies, and a 3.3-V supply for its I/O.

Parametrics

TVP5150AMIPBSR absolute maximum ratings: (1)Supply voltage range: IO_DVDD to DGND: -0.5 V to 4.5 V; (2)DVDD to DGND: -0.5 V to 2.3 V; (3)PLL_AVDD to PLL_AGND: -0.5 V to 2.3 V; (4)CH_AVDD to CH_AGND: -0.5 V to 2.3 V; (5)Digital input voltage range, VI to DGND: -0.5 V to 4.5 V; (6)Input voltage range, XTAL1 to PLL_GND: -0.5 V to 2.3 V; (7)Analog input voltage range AI to CH_AGND: -0.2 V to 2.0 V; (8)Digital output voltage range, VO to DGND: -0.5 V to 4.5 V; (9)Operating free-air temperature, TA: 0 to 70℃; (10)Storage temperature, Tstg: -65 to 150℃.

Features

TVP5150AMIPBSR features: (1)Accepts NTSC (M, 4.43), PAL (B, D, G, H, I, M, N), and SECAM (B, D, G, K, K1, L) video data; (2)Supports ITU-R BT.601 standard sampling; (3)High-speed 9-bit ADC; (4)Two composite inputs or one S-video input; (5)Fully differential CMOS analog preprocessing channels with clamping and automatic gain control (AGC) for best signal-to-noise (S/N) performance; (6)Ultralow power consumption: 115 mW typical; (7)32-pin TQFP package; (8)Power-down mode: <1 mW; (9)Brightness, contrast, saturation, hue, and sharpness control through I2C; (10)Complementary 4-line (3-H delay) adaptive comb filters for both cross-luminance and cross-chrominance noise reduction; (11)Patented architecture for locking to weak, noisy, or unstable signals; (12)Single 14.31818-MHz crystal for all standards; (13)Internal phase-locked loop (PLL) for line-locked clock and sampling; (14)Subcarrier Genlock output for synchronizing color subcarrier of external encoder.

Diagrams